The price of commercial integrated circuits (ICs) is continuously under competitive pressure. Although costs of manufacturing may be reduced in many ways, the cost of testing ICs remains difficult, with cost levels persisting if not increasing. Many IC defects are difficult to detect accurately and reliably, and the testing for such defects may become more increasingly complex as the ICs continue to become smaller and run at higher speeds.
Among ICs that require complex are high-speed input-output (HSIO) devices. Test cost for HSIO devices may be even higher compared to conventional digital counterparts because it can be more difficult to get HSIO testing to work properly and because such testing often utilizes additional specialized high-end ATE (automatic test equipment). In particular, defects in differential bonding wires of HSIO devices may be difficult to detect.
In the testing of HSIO devices, an HSIO loop-back test may offer a useful testing alternative to lower the cost of HSIO test. A conventional HSIO loop-back test, in which one or more transmitter outputs are looped back to transmit test signals to one or more receiver inputs, may allow testing without requiring a dedicated high performance ATE for the HSIO test.
HSIO devices often employ differential signaling through two-bit wires and inherently are fault-tolerant. For this reason, a loop-back test may pass defective HSIO devices that may then fail in field applications. To preserve a low cost benefit of the loop-back test, this test quality gap may be filled with complementary test methods that may require test access to the loop-back test environment.
However, providing test access by connecting test equipment to the differential lines of the high-speed lines for the device commonly interferes with the operation of the devices under test, thereby complicating the testing process.